Quartus中调用IP核,求高手帮助啊!!!
只看楼主 1楼
小菜鸟刚刚上路……求回答……我用Quartus中自带的向导建立了一个双端口RAM的IP核,打开它的verilog文件发现读不懂啊……更不知道如何在主模块中调用了……小弟新手啊……求指点啊!!!
`timescale 1 ps / 1 ps
// synopsys translate_on
module ram (
byteena_a,
data,
rdaddress,
rdclock,
rden,
wraddress,
wrclock,
wren,
q);
input [0:0] byteena_a;
input [7:0] data;
input [1:0] rdaddress;
input rdclock;
input rden;
input [1:0] wraddress;
input wrclock;
input wren;
output [7:0] q;
`ifndef ALTERA_RESERVED_QIS
// synopsys translate_off
`endif
tri1 [0:0] byteena_a;
tri1 rden;
tri1 wren;
`ifndef ALTERA_RESERVED_QIS
// synopsys translate_on
`endif
wire [7:0] sub_wire0;
wire [7:0] q = sub_wire0[7:0];
altsyncram altsyncram_component (
.wren_a (wren),
.clock0 (wrclock),
.clock1 (rdclock),
.byteena_a (byteena_a),
.address_a (wraddress),
.address_b (rdaddress),
.rden_b (rden),
.data_a (data),
.q_b (sub_wire0),
.aclr0 (1'b0),
.aclr1 (1'b0),
.addressstall_a (1'b0),
.addressstall_b (1'b0),
.byteena_b (1'b1),
.clocken0 (1'b1),
.clocken1 (1'b1),
.clocken2 (1'b1),
.clocken3 (1'b1),
.data_b ({8{1'b1}}),
.eccstatus (),
.q_a (),
.rden_a (1'b1),
.wren_b (1'b0));
defparam
altsyncram_component.address_aclr_b = "NONE",
altsyncram_component.address_reg_b = "CLOCK1",
altsyncram_component.byte_size = 8,
altsyncram_component.clock_enable_input_a = "BYPASS",
altsyncram_component.clock_enable_input_b = "BYPASS",
altsyncram_component.clock_enable_output_b = "BYPASS",
altsyncram_component.intended_device_family = "Cyclone III",
altsyncram_component.lpm_type = "altsyncram",
altsyncram_component.maximum_depth = 128,
altsyncram_component.numwords_a = 4,
altsyncram_component.numwords_b = 4,
altsyncram_component.operation_mode = "DUAL_PORT",
altsyncram_component.outdata_aclr_b = "NONE",
altsyncram_component.outdata_reg_b = "CLOCK1",
altsyncram_component.power_up_uninitialized = "FALSE",
altsyncram_component.rdcontrol_reg_b = "CLOCK1",
altsyncram_component.widthad_a = 2,
altsyncram_component.widthad_b = 2,
altsyncram_component.width_a = 8,
altsyncram_component.width_b = 8,
altsyncram_component.width_byteena_a = 1;
endmodule
这里的altsyncram altsyncram_component是调用的其他的函数或者任务或者模块或者库么?求详细指点啊!!
关键词: Quartus 调用 高手 帮助 input al
8楼
一般使用 IP 時
只會給使用 IP 模組的 Input & Output Port
你可以看一下 tool 給的模組外觀為何
再去使用即可
有些 port 即使不使用也無所謂!
以 同步 Ram 模組來看
就只是 Address / Data / CLK / Read / Write 訊號就可控制
有些 Port 不理會亦可
回复
有奖活动 | |
---|---|
请大声喊出:我要开发板! | |
【有奖活动】EEPW网站征稿正在进行时,欢迎踊跃投稿啦 | |
【有奖活动】智能可穿戴设备AR/VR如何引领科技新潮流! | |
奖!发布技术笔记,技术评测贴换取您心仪的礼品 | |
【有奖活动】震撼来袭!这场直播将直击工程师的心灵! |
打赏帖 | |
---|---|
如何实现基于NXPiMX.RT1021的BH1730采集被打赏5分 | |
玩转“DFRobot盖革计数器模块”准备工作认识模块知识分享被打赏30分 | |
【换取手持数字示波器】AHT10温度检测分享被打赏40分 | |
【换取手持数字示波器】ACM32F070开发板点亮LCD屏和触控按键,串口,ADC被打赏40分 | |
【换取手持数字示波器】ACM32F070LCD屏和触控按键功驱动蜂鸣器分享被打赏40分 | |
【换取手持数字示波器】国民技术PWM功能知识分享被打赏40分 | |
【换取手持数字示波器】放大器运放知识分享被打赏40分 | |
【分享评测,赢取加热台】+开关电源AC输入知识分享被打赏30分 | |
【换取手持数字示波器】N32G430点亮数码管与串口打印、ADC被打赏40分 | |
老胖子聊电路--分析一个反馈电路被打赏50分 |