器件名称: AD5933
功能描述: 1 MSPS 12-Bit Impedance Converter, Network Analyzer
文件大小: 553.24KB 共20页
简 介:Preliminary Technical Data
FEATURES
50KHz Max Excitation Output Impedance Range .1k-20M, 12 Bit Resolution Selectable System Clock from the following: PLL, RC Oscillator, External Clock DSP Real and Imaginary Calculation (FFT) 3V Power Supply, Programmable Sinewave Output Frequency Resolution 27 Bits (<0.1Hz) Frequency Sweep Capability 12 Bit Sampling ADC ADC Sampling 1MSPS, INL +/- 1LSB Max. On Chip Temp Sensor allows +/-2 oC accuracy Serial I2C Loading Temperature Range –40-125oC 16 SSOP
1 MSPS 12-Bit Impedance Converter, Network Analyzer AD5933
To determine the actual real impedance value Z(W) , generally a frequency sweep is performed. The impedance can be calculated at each point and a frequency vs magnitude plot can be created. The system allows the user to program a 2V PK-PK sinusoidal signal as excitation to an external load. Output ranges of 1V, 500mV, 200mV can also be programmed. The signal is provided on chip using DDS techniques. Frequency resolution of 27 bits (less than 0.1HZ) can be achieved. The clock for the DDS can be generated from an external reference clock, an internal RC oscillator or an internal PLL. The PLL has a gain stage of 512 and typically needs a reference clock of 32KHz on the MCLK pin. To perform the frequency sweep, the user must first program the conditions required for the sweep; start frequency, delta frequency, step frequency, etc. A Start Command is then required to begin the sweep. At each point on the sweep the ADC will take 1024 sam……
