器件名称: W134SSQCT
功能描述: Direct Rambus Clock Generator
文件大小: 198.91KB 共12页
简 介:W134M/W134S
Direct Rambus Clock Generator
Features
Differential clock source for Direct Rambus memory subsystem for up to 800-MHz data transfer rate Provide synchronization flexibility: the Rambus Channel can optionally be synchronous to an external system or processor clock Power-managed output allows Rambus Channel clock to be turned off to minimize power consumption for mobile applications Works with Cypress CY2210, W133, W158, W159, W161, and W167 to support Intel architecture platforms Low-power CMOS design packaged in a 24- pin QSOP (150-mil SSOP) package
Description
The Cypress W134M/W134S provides the differential clock signals for a Direct Rambus memory subsystem. It includes signals to synchronize the Direct Rambus Channel clock to an external system clock but can also be used in systems that do not require synchronization of the Rambus clock.
Block Diagram
REFCLK MULT0:1
Pin Configuration
VDDIR REFCLK VDD GND GND PCLKM SYNCLKN GND VDD VDDIPD STOPB PWRDNB 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 S0 S1 VDD GND CLK NC CLKB GND VDD MULT0 MULT1 GND
PLL
PCLKM SYNCLKN
Phase Alignment
Output Logic
CLK CLKB
S0:1
Test Logic
STOPB
Cypress Semiconductor Corporation Document #: 38-07426 Rev. *B
3901 North First Street
San Jose, CA 95134 408-943-2600 Revised December 11, 2003
W134M/W134S
Pin Definitions
Pin Name REFCLK PCLKM No. 2 6 Type I I Description Reference Clock Input. Reference clock input, normally supplied by a system fr……
