器件名称: W162
功能描述: Spread Aware
文件大小: 147.46KB 共7页
简 介:W162
Spread Aware, Zero Delay Buffer
Features
Spread Aware—designed to work with SSFTG reference signals Two banks of four outputs, plus the fed back output Outputs may be three-stated Available in 16-pin SOIC or SSOP package Extra strength output drive available (-19 version) Internal feedback Table 1. Input Logic SEL1 0 0 1 1 SEL0 0 1 0 1 QA0:3 ThreeState Active Active Active QB0:3 ThreeState ThreeState Active Active PLL Shutdown Active, Utilized Shutdown, Bypassed Active, Utilized QFB Active Active Active Active
Key Specifications
Operating Voltage: ............................................... 3.3V±10% Operating Range: ................................15 < fOUT < 133 MHz Cycle-to-Cycle Jitter: .................................................. 250 ps Output to Output Skew: ............................................. 150 ps Propagation Delay: ..................................................... 150 ps
Block Diagram
Pin Configuration
QFB REF PLL
REF
MUX QA0 QA1 QA2
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
QFB QA3 QA2 VDD GND QB3 QB2 SEL0
QA0 QA1 VDD GND QB0
QA3 QB0
SEL0
QB1 SEL1
SEL1 QB1 QB2 QB3
Spread Aware is a trademark of Cypress Semiconductor Corporation.
Cypress Semiconductor Corporation Document #: 38-07150 Rev. *A
3901 North First Street
San Jose
CA 95134 408-943-2600 Revised December 14, 02
W162
Pin Definitions
Pin Name REF QFB QA0:3 QB0:3 VDD GND SEL0:1 Pin No. 1 16 2, 3, 14, 15 6, 7, 10, 11 4, 13 5, 12 9, 8 Pin Type I O O O P P ……
