器件名称: ASM2I9940LG-32-LT
功能描述: Low Voltage 1:18 Clock Distribution Chip
文件大小: 223.8KB 共13页
简 介:June 2005 rev 1.0 Low Voltage 1:18 Clock Distribution Chip
Features
LVPECL or LVCMOS Clock Input 2.5V LVCMOS Outputs for Pentium II Microprocessor Support* 150pS Maximum Output-to-Output Skew Maximum Output Frequency of 250MHz 32 Lead LQFP & TQFP Packaging Dual or Single Supply Device: Dual VCC Supply Voltage, 3.3V Core and 2.5V Output Single 3.3V VCC Supply Voltage for 3.3V Outputs Single 2.5V VCC Supply Voltage for 2.5V I/O
ASM2I9940L
With low output impedance (≈20), in both the HIGH and LOW logic states, the output buffers of the ASM2I9940L are ideal for driving series terminated transmission lines. With a 20 output impedance the ASM2I9940L has the capability of driving two series terminated lines from each output. This gives the device an effective fanout of 1:36. The differential LVPECL inputs of the ASM2I9940L allow the device to interface directly with a LVPECL fanout buffer to build very wide clock fanout trees or to couple to a high frequency clock source. The LVCMOS input provides a more standard interface for applications requiring only a single clock distribution chip at relatively low frequencies. In addition, the two clock sources can be used to provide for a test clock interface as well as the primary system clock. A logic HIGH on the LVCMOS_CLK_Sel pin will select the LVCMOS level clock input. All inputs of the ASM2I9940L have internal pullup/pulldown resistor, so they can be left open if unused. The ASM2I9940L is a single or dual supply device. Th……
