器件名称: AZ100EL11
功能描述: ECL/PECL 1:2 Differential Fanout Buffer
文件大小: 137.43KB 共6页
简 介:ARIZONA MICROTEK, INC.
AZ10EL11 AZ100EL11
ECL/PECL 1:2 Differential Fanout Buffer FEATURES
265ps Propagation Delay 5ps Skew Between Outputs High Bandwidth Output Transitions 75k Internal Input Pulldown Resistors Direct Replacement for ON Semiconductor MC10EL11 & MC100EL11 PACKAGE AVAILABILITY PACKAGE SOIC 8 SOIC 8 T&R SOIC 8 T&R SOIC 8 SOIC 8 T&R SOIC 8 T&R TSSOP 8 TSSOP 8 T&R TSSOP 8 T&R TSSOP 8 TSSOP 8 T&R TSSOP 8 T&R PART NO. AZ10EL11D AZ10EL11DR1 AZ10EL11DR2 AZ100EL11D AZ100EL11DR1 AZ100EL11DR2 AZ10EL11T AZ10EL11TR1 AZ10EL11TR2 AZ100EL11T AZ100EL11TR1 AZ100EL11TR2 MARKING AZM10EL11 AZM10EL11 AZM10EL11 AZM100EL11 AZM100EL11 AZM100EL11 AZTEL11 AZTEL11 AZTEL11 AZHEL11 AZHEL11 AZHEL11
DESCRIPTION
The AZ10/100EL11 is a differential 1:2 fanout gate. The device is functionally similar to the E111 device but with higher performance capabilities. Having within-device skews and output transition times significantly improved over the E111, the EL11 is ideally suited for those applications that require the ultimate in AC performance. The differential inputs of the EL11 employ clamping circuitry to maintain stability under open input conditions. If the inputs are left open (pulled to VEE) the Q outputs will go LOW. NOTE: Specifications in the ECL/PECL tables are valid when thermal equilibrium is established. LOGIC DIAGRAM AND PINOUT ASSIGNMENT
Q0 1
PIN DESCRIPTION PIN D, D Q0, Q0 , Q1, Q1 VCC VEE FUNCTION Data Inputs Data Outputs Positive Supply Negative Supply
8
VCC
Q0 ……