器件名称: 74HC7266N
功能描述: Quad 2-input EXCLUSIVE-NOR gate
文件大小: 29.81KB 共4页
简 介:INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC7266 Quad 2-input EXCLUSIVE-NOR gate
Product specication File under Integrated Circuits, IC06 December 1990
Philips Semiconductors
Product specication
Quad 2-input EXCLUSIVE-NOR gate
FEATURES Output capability: standard ICC category: SSI GENERAL DESCRIPTION
74HC7266
The 74HC7266 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC7266 provide the EXCLUSIVE-NOR function with active push-pull output. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns TYPICAL SYMBOL tPHL/ tPLH CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD × VCC2 × fi +∑ (CL × VCC2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz CL = output load capacitance in pF VCC = supply voltage in V ∑ (CL × VCC2 × fo) = sum of outputs 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC 1.5 V ORDERING INFORMATION See “74HC/HCT/HCU/HCMOS Logic Package Information”. PARAMETER propagation delay nA, nB to nY input capacitance power dissipation capacitance per gate note 1 CONDITIONS HC CL = 15 pF; VCC = 5 V 11 3.5 17 ns pF pF UNIT
December 1990
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Philips……
