器件名称: 74LVT02PW
功能描述: 3.3V Quad 2-input NOR gate
文件大小: 81.94KB 共10页
简 介:INTEGRATED CIRCUITS
74LVT02 3.3V Quad 2-input NOR gate
Product specification IC24 Data Handbook 1996 Aug 15
Philips Semiconductors
Philips Semiconductors
Product specification
3.3V Quad 2-input NOR gate
74LVT02
QUICK REFERENCE DATA
SYMBOL PARAMETER Propagation delay An or Bn to Yn Input capacitance Total supply current CONDITIONS Tamb = 25°C; GND = 0V CL = 50pF; VCC = 3.3V VI = 0V or 3.0V Outputs Low; VCC = 3.6V TYPICAL UNIT
tPLH tPHL CIN ICCL
2.8 2.6 3 1
ns pF mA
ORDERING INFORMATION
PACKAGES 14-Pin Plastic SO 14-Pin Plastic SSOP 14-Pin Plastic TSSOP TEMPERATURE RANGE –40°C to +85°C –40°C to +85°C –40°C to +85°C OUTSIDE NORTH AMERICA 74LVT02 D 74LVT02 DB 74LVT02 PW NORTH AMERICA 74LVT02 D 74LVT02 DB 74LVT02PW DH DWG NUMBER SOT108-1 SOT337-1 SOT402-1
LOGIC SYMBOL
A0 B0 A1 B1 A2 B2 VCC = Pin 14 GND = Pin 7 A3 B3 2 3 5 6 8 9 11 12 13 1 Y0
PIN CONFIGURATION
Y0 A0 4 Y1 B0 Y1 Y2 A1 Y3 B1 GND 5 6 7 10 9 8 Y2 B2 A2 1 2 3 4 14 13 12 11 VCC Y3 B3 A3
10
SA00335
SA00337
LOGIC SYMBOL (IEEE/IEC) PIN DESCRIPTION
2 3 1 1
PIN NUMBER 2, 3, 5, 6, 8, 9, 11, 12
SYMBOL An-Bn Yn GND VCC
NAME AND FUNCTION Data inputs Data outputs Ground (0V) Positive supply voltage
5 4 6
1, 4, 10, 13 7
10
8 9
14
11 13 12
SF00010
1996 Aug 15
2
853-1859 17184
Philips Semiconductors
Product specification
3.3V Quad 2-input NOR gate
74LVT02
LOGIC DIAGRAM
2 3 5 6 8 9 11 12
FUNCTION TABLE
INPUTS Dna L Dnb L H L OUTPUT Qn H L L L
A0 B0 A1 A2 B1 B2 A3 B3
L H
Y0 Y1 Y2 Y3
VCC = Pin 14 ……
