器件名称: 74HC242
功能描述: Quad bus transceiver; 3-state; inverting
文件大小: 49.17KB 共7页
简 介:INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT242 Quad bus transceiver; 3-state; inverting
Product specication File under Integrated Circuits, IC06 December 1990
Philips Semiconductors
Product specication
Quad bus transceiver; 3-state; inverting
FEATURES Inverting 3-state outputs 2-way asynchronous data bus communication Output capability: bus driver ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT242 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL
74HC/HCT242
(LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT242 are quad bus transceivers featuring inverting 3-state bus compatible outputs in both send and receive directions. They are designed for 4-line asynchronous 2-way data communications between data buses. The output enable inputs (OEA and OEB) can be used to isolate the buses. The “242” is similar to the “243” but has inverting outputs.
QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns TYPICAL SYMBOL tPHL/ tPLH PARAMETER propagation delay An to Bn; Bn to An input capacitance input/output capacitance power dissipation capacitance per transceiver notes 1 and 2 CONDITIONS HC CL = 15 pF; VCC = 5 V 7 HCT 10 ns UNIT
CI CI/O CPD Notes
3.5 10 29
3.5 10 32
pF pF pF
1. CPD is u……
