器件名称: 74LVQ240_04
功能描述: LOW VOLTAGE OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (INVERTED)
文件大小: 250.73KB 共12页
简 介:74LVQ240
LOW VOLTAGE OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (INVERTED)
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HIGH SPEED: tPD = 6 ns (TYP.) at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 4 A (MAX.) at TA=25°C LOW NOISE: VOLP = 0.4V (TYP.) at VCC = 3.3V 75 TRANSMISSION LINE OUTPUT DRIVE CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12mA (MIN) at VCC = 3.0 V PCI BUS LEVELS GUARANTEED AT 24 mA BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 240 IMPROVED LATCH-UP IMMUNITY
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TSSOP
Table 1: Order Codes
PACKAGE SOP TSSOP T&R 74LVQ240MTR 74LVQ240TTR
DESCRIPTION The 74LVQ240 is a low voltage CMOS OCTAL BUS BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS
technology. It is ideal for low power and low noise 3.3V applications. G output control governs four BUS BUFFERs. This device is designed to be used with 3 state memory address drivers, etc. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
Figure 1: Pin Connection And IEC Logic Symbols
July 2004
Rev. 7
1/12
74LVQ240
Figure 2: Input And Output Equivalent Circuit Table 2: Pin Description
PIN N° 1 2, 4, 6, 8 9, 7, 5, 3 11, 13, 15, 17 18, 16, 14, 12 19 10 20 SYMBOL 1G 1A1 to 1A4 2Y1 to 2Y4 2A1 to 2A4 1Y1 to 1Y4 2G GND VCC NAME AND FUNCTION Output Enable Input Data Inputs……
