器件名称: 74VHCT125A
功能描述: QUAD BUS BUFFERS (3-STATE)
文件大小: 225.72KB 共12页
简 介:74VHCT125A
QUAD BUS BUFFERS (3-STATE)
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HIGH SPEED: tPD = 3.8 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 2 A (MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN.), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS & OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 4.5V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 125 IMPROVED LATCH-UP IMMUNITY LOW NOISE: VOLP = 0.8V (MAX.)
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Table 1: Order Codes
PACKAGE SOP TSSOP T&R 74VHCT125AMTR 74VHCT125ATTR
DESCRIPTION The 74VHCT125A is an advanced high-speed CMOS QUAD BUS BUFFERS fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The device requires the 3-STATE control input G to be set high to place the output in to the high impedance state.
Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V since all inputs are equipped with TTL threshold. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
Figure 1: Pin Connection And IEC Logic Symbols
December 2004
Rev. 6
1/12
74VHCT125A
Figure 2: Input Equivalent Circuit Table 2: Pin Description
PIN N° 1, 4, 10, 13 2, 5, 9, 12 3, 6, 8, 11 7 14 SYMBOL 1G to 4G 1A to 4A 1Y to 4Y GND VCC NAM……