器件名称: 74VHCT244ATTR
功能描述: OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (NON INVERTED)
文件大小: 242.11KB 共12页
简 介:74VHCT244A
OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (NON INVERTED)
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HIGH SPEED: tPD = 5.4 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 A (MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN.), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS & OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 4.5V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 244 IMPROVED LATCH-UP IMMUNITY LOW NOISE: VOLP = 0.9V (MAX.)
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Table 1: Order Codes
PACKAGE SOP TSSOP T&R 74VHCT244AMTR 74VHCT244ATTR
DESCRIPTION The 74VHCT244A is an advanced high-speed CMOS OCTAL BUS BUFFER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. G enable input governs four BUS BUFFERs.
This device is designed to be used with 3 state memory address drivers, etc. Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V since all inputs are equipped with TTL threshold. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
Figure 1: Pin Connection And IEC Logic Symbols
December 2004
Rev. 4
1/12
74VHCT244A
Figure 2: Input Equivalent Circuit Table 2: Pin Description
PIN N° 1 2, 4, 6, 8 9, 7, 5, 3 11, 13, 15, 17 18, 16, 1……
