器件名称: MC54-74HC240A
功能描述: Octal 3-State Inverting Buffer/Line Driver/Line Receiver
文件大小: 168.01KB 共7页
简 介:MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal 3-State Inverting Buffer/ Line Driver/Line Receiver
High–Performance Silicon–Gate CMOS
The MC54/74HC240A is identical in pinout to the LS240. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This octal noninverting buffer/line driver/line receiver is designed to be used with 3–state memory address drivers, clock drivers, and other sub–oriented systems. The device has inverting outputs and two active–low output enables. The HC240A is similar in function to the HC241A and HC244A. Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2 to 6 V Low Input Current: 1 A High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 120 FETs or 30 Equivalent Gates
MC54/74HC240A
J SUFFIX CERAMIC PACKAGE CASE 732–03
1
20
20 1
N SUFFIX PLASTIC PACKAGE CASE 738–03 DW SUFFIX SOIC PACKAGE CASE 751D–04 DT SUFFIX TSSOP PACKAGE CASE 948E–02
20 1
20 1
ORDERING INFORMATION MC54HCXXXAJ MC74HCXXXAN MC74HCXXXADW MC74HCXXXADT Ceramic Plastic SOIC TSSOP
LOGIC DIAGRAM
A1 A2 A3 A4 DATA INPUTS B1 B2 B3 B4 2 4 6 8 11 13 15 17 18 16 14 12 9 7 5 3 YA1 YA2 YA3 YA4 YB1 YB2 YB3 YB4 INVERTING OUTPUTS
PIN ASSIGNMENT
ENABLE A A1 YB4 A2 YB3 A3 YB2 A4 YB1 GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC ENABLE B YA1 B4 YA2 B3 YA3 B2 YA4 ……
