器件名称: X25256V20IG
功能描述: 5MHz SPI Serial E 2 PROM with Block Lock
文件大小: 488.6KB 共17页
简 介:This X25256 device has been acquired by IC MICROSYSTEMS from Xicor; Inc.
Preliminary Information 256K
X25256
5MHz SPI Serial E 2PROM with Block Lock
32K x 8 Bit
Protection
FEATURES 5MHz Clock Rate Low Power CMOS —<1A standby current —<5mA active current 2.5V To 5.5V Power Supply SPI Modes (0,0 & 1,1) 32K X 8 Bits —64 byte page mode Block Lock Protection —Protect first page, first 2 pages, first 4 pages, first 8 pages, 1/4, 1/2 or all of E2PROM array
Programmable Hardware Write Protection
Packages —8lead XBGA —8-lead SOIC (JEDEC, EIAJ) —20-lead TSSOP DESCRIPTION
2 The X25256 is a CMOS 256K-bit serial E
PROM, internally organized as 32K x 8. The X25256 features a Serial Peripheral Interface (SPI) and software protocol
allowing operation on a simple three-wire bus. The bus signals are a clock input (SCK) plus separate data in
(SI) and data out (SO) lines. Access to the device is controlled through a chip select (CS) input, allowing any
—In-circuit programmable ROM mode Built-In Inadvertent Write Protection —Power-up/down protection circuitry —Write enable latch
number of devices to share the same bus.
The X25256 also features two additional inputs that provide the end user with added flexibility. By asserting the HOLD input, the X25256 will ignore transitions on its inputs, thus allowing the host to service higher priority interrupts. The WP input can be used as a hardwire input to the X25256 disabling all write attempts to the status register, thus providing a mechan……
