器件名称: 74HC4052PW
功能描述: Dual 4-channel analog multiplexer, demultiplexer
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74HC4052; 74HCT4052 Dual 4-channel analog multiplexer, demultiplexer
Product specication Supersedes data of 2003 May 16 2004 Nov 11
Philips Semiconductors
Product specication
Dual 4-channel analog multiplexer, demultiplexer
FEATURES Wide analog input voltage range from 5 V to +5 V Low ON-resistance: – 80 (typical) at VCC VEE = 4.5 V – 70 (typical) at VCC VEE = 6.0 V – 60 (typical) at VCC VEE = 9.0 V Logic level translation: to enable 5 V logic to communicate with ±5 V analog signals Typical “break before make” built in Complies with JEDEC standard no. 7A ESD protection: – HBM EIA/JESD22-A114-B exceeds 2000 V – MM EIA/JESD22-A115-A exceeds 200 V. Specified from 40 °C to +85 °C and 40 °C to +125 °C. APPLICATIONS Analog multiplexing and demultiplexing Digital multiplexing and demultiplexing Signal gating. DESCRIPTION
74HC4052; 74HCT4052
The 74HC4052 and 74HCT4052 are high-speed Si-gate CMOS devices and are pin compatible with the HEF4052B. They are specified in compliance with JEDEC standard no. 7A. The 74HC4052 and 74HCT4052 are dual 4-channel analog multiplexers or demultiplexers with common select logic. Each multiplexer has four independent inputs/outputs (pins nY0 to nY3) and a common input/output (pin nZ). The common channel select logics include two digital select inputs (pins S0 and S1) and an active LOW enable input (pin E). When pin E = LOW, one of the four switches is selected (low-impedance ON-state) with pins S0……
