器件名称: 74LVQ20TTR
功能描述: DUAL 4-INPUT NAND GATE
文件大小: 153.41KB 共8页
简 介:74LVQ20
DUAL 4-INPUT NAND GATE
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HIGH SPEED: tPD = 5.3 ns (TYP.) at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2A(MAX.) at TA=25°C LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V 75 TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12mA (MIN) at VCC = 3.0 V PCI BUS LEVELS GUARANTEED AT 24 mA BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 3.6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 20 IMPROVED LATCH-UP IMMUNITY
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PACKAGE SOP TSSOP TUBE 74LVQ20M T&R 74LVQ20MTR 74LVQ20TTR
DESCRIPTION The 74LVQ20 is a low voltage CMOS DUAL 4-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS
technology. It is ideal for low power and low noise 3.3V applications. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
July 2001
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74LVQ20
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No 1, 9 2, 10 3, 11 4, 12 5, 13 6, 8 7 14 SYMBOL 1A to 2A 1B to 2B N.C. 1C to 2C 1D to 2D 1Y to 2Y GND VCC NAME AND FUNCTION Data Inputs Data Inputs Not Connected Data Inputs Data Inputs Data Outputs Ground (0V) Positive Supply Voltage
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X : Don’t Care……
