器件名称: AS4SD4M16DG-10/IT
功能描述: 4 Meg x 16 SDRAM Synchronous DRAM Memory
文件大小: 1150.56KB 共50页
简 介:SDRAM
Austin Semiconductor, Inc. 4 Meg x 16 SDRAM
Synchronous DRAM Memory
FEATURES
Extended Testing Over -55°C to +125° C and Industrial Temp -40°C to 85° C WRITE Recovery ( tWR/ tDPL) tWR = 2 CLK Fully synchronous; all signals registered on positive edge of system clock Internal pipelined operation; column address can be changed every clock cycle Internal banks for hiding row access/precharge Programmable burst lengths: 1, 2, 4, 8 or full page Auto Precharge and Auto Refresh Modes Self Refresh Mode (Industrial, -40°C to 85° C only) 4,096-cycle refresh LVTTL-compatible inputs and outputs Single +3.3V ±0.3V power supply Longer lead TSOP for improved reliability (OCPL*) Short Flow / Long Flow Test Screening Options
AS4SD4M16
PIN ASSIGNMENT (Top View)
54-Pin TSOP
OPTIONS
MARKING
4M16 No. 901
Note: “\” indicates an active low.
Configurations 4 Meg x 16 (1 Meg x 16 x 4 banks) Plastic Package - OCPL* 54-pin TSOP (400 mil) DG Timing (Cycle Time) 8ns; tAC = 6.5ns @ CL = 3 ( tRP - 24ns) 10ns; tAC = 9ns @ CL = 2 Operating Temperature Ranges -Military (-55°C to +125° C) -Industrial Temp (-40°C to 85° C)
-8 -10
XT IT
4 Meg x 16 Configuration 1 Meg x 16 x 4 banks Refresh Count 4K Row Addressing 4K (A0-A11) Bank Addressing 4 (BA0, BA1) Column Addressing 256 (A0-A7)
KEY TIMING PARAMETERS
SPEED GRADE -8 -10 -8 -10 CLOCK ACCESS TIME FREQUENCY CL = 2** CL = 3** 125 MHz – 6.5ns 100 MHz – 7ns 83 MHz 9ns – 66 MHz 9ns – SETUP TIME 2ns 3ns 2ns 3ns HOLD TIME 1ns 1ns 1ns 1n……
