器件名称: VDS6632A4A-55
功能描述: Synchronous DRAM(512K X 32 Bit X 4 Banks)
文件大小: 648.11KB 共8页
简 介:V-Data
Synchronous DRAM General Description
The VDS6632A4A are four-bank Synchronous DRAMs organized as 524,288 words x 32 bits x 4 banks, Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth high performance memory system applications
VDS6632A4A
512K x 32 Bit x 4 Banks Features
JEDEC standard LVTTL 3.3V power supply MRS Cycle with address key programs -CAS Latency (2 & 3) -Burst Length (1,2,3,8,& full page) -Burst Type (sequential & Interleave) 4 banks operation All inputs are sampled at the positive edge of the system clock Burst Read single write operation Auto & Self refresh 4096 refresh cycle DQM for masking Package:86-pins 400 mil TSOP-Type II
Ordering Information.
Part No. VDS6632A4A-5 VDS6632A4A-5.5 VDS6632A4A-6 Frequency 200Mhz 183Mhz 166Mhz Interface LVTTL LVTTL LVTTL Package 400mil 86pin TSOPII 400mil 86pin TSOPII 400mil 86pin TSOPII
Pin Assignment
V DD D Q0 VDD Q D Q1 D Q2 VSSQ D Q3 D Q4 VDD Q DQ 5 DQ 6 VSSQ DQ 7 NC V DD DQM 0 WE CA S RA S CS
NC BA0 BA1 A1 0/A P A0 A1 A2 D QM 2 V DD NC DQ 16 V S SQ DQ 17 DQ 18 V DD Q DQ 19 DQ 20 V S SQ DQ 21 DQ 22
V DD Q D Q 23 V DD
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 ……
