器件名称: 74F1071
功能描述: 18-Bit Undershoot/Overshoot Clamp
文件大小: 91.83KB 共6页
简 介:74F1071 18-Bit Undershoot/Overshoot Clamp
October 1994 Revised August 1999
74F1071 18-Bit Undershoot/Overshoot Clamp and ESD Protection Device
General Description
The 74F1071 is an 18-bit undershoot/overshoot clamp which is designed to limit bus voltages and also to protect more sensitive devices from electrical overstress due to electrostatic discharge (ESD). The inputs of the device aggressively clamp voltage excursions nominally at 0.5V below and 7V above ground.
Features
s 18-bit array structure in 20-pin package s FAST Bipolar voltage clamping action s Dual center pin grounds for min inductance s Robust design for ESD protection s Low input capacitance s Optimum voltage clamping for 5V CMOS/TTL applications
Ordering Code:
Order Number 74F1071SC 74F1071MSA 74F1071MTC Package Number M20B MSA20 MTC20 Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Note: Simplified Component Representation
FAST is a registered trademark of Fairchild Semiconductor Corporation.
1999 Fairchild Semiconductor Corporation
DS011685
www.fairchildsemi.com
74F1071
Absolute Maximum Ratings(Note 1)
Storage Temperature Ambient Temperature under Bias Junction Temperature under Bi……
