器件名称: 74HC164
功能描述: 8-Bit Serial-Input/Parallel-Output Shift Register
文件大小: 204.03KB 共7页
简 介:MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
8-Bit Serial-Input/ Parallel-Output Shift Register
High–Performance Silicon–Gate CMOS
The MC54/74HC164 is identical in pinout to the LS164. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The MC54/74HC164 is an 8–bit, serial–input to parallel–output shift register. Two serial data inputs, A1 and A2, are provided so that one input may be used as a data enable. Data is entered on each rising edge of the clock. The active–low asynchronous Reset overrides the Clock and Serial Data inputs. Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2 to 6 V Low Input Current: 1 A High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 244 FETs or 61 Equivalent Gates
MC54/74HC164
Do Not Use for New Designs
THIS DEVICE WILL BE SUPERCEDED BY MC54/74HC164A IN THE SECOND QUARTER OF 1996
14 1
J SUFFIX CERAMIC PACKAGE CASE 632–08
14 1
N SUFFIX PLASTIC PACKAGE CASE 646–06
14 1
D SUFFIX SOIC PACKAGE CASE 751A–03
ORDERING INFORMATION
LOGIC DIAGRAM
SERIAL DATA INPUTS 1 2 DATA
A1 A2
3 4 5 6 10 11 12 CLOCK 8 13
MC54HCXXXJ MC74HCXXXN MC74HCXXXD QA QB QC QD QE QF QG QH PARALLEL DATA OUTPUTS
Ceramic Plastic SOIC
PIN ASSIGNMENT
A1 A2 QA QB QC QD GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC QH QG QF QE RESET CLOCK
RESET
9
PIN 14 = ……
