器件名称: 74HC4017
功能描述: Johnson decade counter with 10 decoded outputs
文件大小: 132.49KB 共23页
简 介:74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs
Rev. 03 — 8 January 2008 Product data sheet
1. General description
The 74HC4017; 74HCT4017 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4017. The 74HC4017; 74HCT4017 is a 5-stage Johnson decade counter with 10 decoded active HIGH outputs (Q0 to Q9), an active LOW output from the most signicant ip-op (Q5-9), active HIGH and active LOW clock inputs (CP0 and CP1) and an overriding asynchronous master reset input (MR). The counter is advanced by either a LOW-to-HIGH transition at CP0 while CP1 is LOW or a HIGH-to-LOW transition at CP1 while CP0 is HIGH (see Table 3). When cascading counters, the Q5-9 output, which is LOW while the counter is in states 5, 6, 7, 8 and 9, can be used to drive the CP0 input of the next counter. A HIGH on MR resets the counter to zero (Q0 = Q5-9 = HIGH; Q1 to Q9 = LOW) independent of the clock inputs (CP0 and CP1). Automatic code correction of the counter is provided by an internal circuit: following any illegal code the counter returns to a proper counting mode within 11 clock pulses.
2. Features
s Multiple package options s Complies with JEDEC standard no. 7 A s ESD protection: x HBM JESD22-A114E exceeds 2000 V x MM JESD22-A115-A exceeds 200 V s Specied from 40 °C to +85 °C and from 40 °C to +125 °C
NXP Semiconductors
74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs
3. Ordering information
Table 1. Ordering information Package Temperat……
