器件名称: 74HC4050D
功能描述: Hex high-to-low level shifter
文件大小: 40.69KB 共7页
简 介:INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC4050 Hex high-to-low level shifter
Product specication File under Integrated Circuits, IC06 December 1990
Philips Semiconductors
Product specication
Hex high-to-low level shifter
FEATURES Output capability: standard ICC category: SSI GENERAL DESCRIPTION The 74HC4050 is a high-speed Si-gate CMOS device and is pin compatible with the “4050” of the “4000B” series. It is specified in compliance with JEDEC standard no. 7A. The 74HC4050 provides six non-inverting buffers with a modified input protection structure, which has no diode connected to VCC. Input voltages of up to 15 V may QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns TYPICAL SYMBOL tPHL / tPLH CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD × VCC2 × fi +∑ (CL × VCC2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz CL = output load capacitance in pF VCC = supply voltage in V ∑ (CL × VCC2 × fo) = sum of outputs ORDERING INFORMATION See “74HC/HCT/HCU/HCMOS Logic Package Information”. PARAMETER propagation delay nA to nY input capacitance power dissipation capacitance per buffer note 1 CONDITIONS HC CL = 15 pF; VCC = 5 V 7 3.5 14
74HC4050
therefore be used. This feature enables the non-inverting……
