器件名称: 74HCT280D
功能描述: 9-bit odd/even parity generator/checker
文件大小: 49.67KB 共7页
简 介:INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT280 9-bit odd/even parity generator/checker
Product specication File under Integrated Circuits, IC06 December 1990
Philips Semiconductors
Product specication
9-bit odd/even parity generator/checker
FEATURES Word-length easily expanded by cascading Similar pin configuration to the “180” for easy system up-grading Generates either odd or even parity for nine data bits Output capability: standard ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT280 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT280 are 9-bit parity generators or checkers commonly used to detect errors in high-speed data QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
74HC/HCT280
transmission or data retrieval systems. Both even and odd parity outputs are available for generating or checking even or odd parity up to 9 bits. The even parity output (∑E) is HIGH when an even number of data inputs (I0 to I8) are HIGH. The odd parity output (∑0) is HIGH when an odd number of data inputs are HIGH. Expansion to larger word sizes is accomplished by tying the even outputs (∑E) of up to nine parallel devices to the data inputs of……
