器件名称: M74HC40103B1R
功能描述: 8 STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTER
文件大小: 662.2KB 共16页
简 介:M74HC40103
8 STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTER
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HIGH SPEED : fMAX = 38MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC =4A(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 40103
DIP
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TSSOP
ORDER CODES
PACKAG E DIP SOP TSSOP TUBE T&R
DESCRIPTION The M74HC40103 is an high speed CMOS 8-STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTER fabricated with silicon gate C2MOS technology. The HC40103 consists of an 8 stage synchronous down counter with a single output which is active when the internal count is zero. The HC40103 contains a single 8-bit binary counter. This device has control inputs for enabling or disabling the clock, for clearing the counter to its maximum count, and for presetting the counter either synchronously or asynchronously. All control inputs and the CARRY-OUT / ZERO DETECT output are active low logic. In normal operation the counter is decremented by one count on each positive transition of the CLOCK. Counting is PIN CONNECTION AND IEC LOGIC SYMBOLS
M74HC40103B1R M74HC40103M1R M74HC40103RM13TR M74HC40103TTR
inhibited when the CARRY-IN / COUNTER ENABLE (CI/CE) input is high. The CARRY-OUT / ZERO-DETECT (CO/ZD) output goes low when the count reaches zero if the CI/CE input is low, and remains low for one full clock period. Wh……