器件名称: AZ100LVEL16VRX
功能描述: ECL/PECL Oscillator Gain Stage & Buffer with Selectable Enable
文件大小: 191.83KB 共13页
简 介:ARIZONA MICROTEK, INC.
AZ100LVEL16VR
ECL/PECL Oscillator Gain Stage & Buffer with Selectable Enable FEATURES
Green and RoHS Compliant / Lead (Pb) Free Packages Available Enhanced Enable Operation High Bandwidth for ≥1GHz Similar Operation as AZ100EL16VO Minimizes External Components Selectable Enable Polarity and Threshold (CMOS/TTL or PECL) Available in a MLP 16 or MLP 8 Package S–Parameter (.s2p) and IBIS Model Files Available on Arizona Microtek Website PACKAGE
MLP 16 (3x3) MLP 16 (3x3) RoHS Compliant / Lead (Pb) Free MLP 8 (2x2) Green / RoHS Compliant / Lead (Pb) Free DIE
1 2 3
PACKAGE AVAILABILITY PART NO.
AZ100LVEL16VRL AZ100LVEL16VRL+ AZ100LVEL16VRNEG AZ100LVEL16VRX
MARKING
AZM 16R AZM+ 16R R5G N/A
NOTES
1,2 1,2 1,2 3
Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K parts) Tape & Reel. Date code format: “Y” for year followed by “WW” for week. Waffle Pack
DESCRIPTION
The AZ100LVEL16VR is a specialized oscillator gain stage with high gain output buffer including an enable function. The QHG/Q HG outputs have voltage gain several times greater than the Q/Q outputs. MLP 16, 3x3 mm Package (VRL) or DIE (VRX) The AZ100LVEL16VR provides a selectable QHG/Q HG enable that allows continuous oscillator operation via the Q/Q outputs. The enable truth table on the next page shows the operating modes. Leaving EN-SEL open (NC) selects PECL/ECL operation for the EN pad/pin. In this mode the QHG/Q HG outputs ……
