器件名称: MSM8128VL-70
功能描述: 128K x 8 SRAM
文件大小: 585.07KB 共10页
简 介:TRAILING EDGE PRODUCT - MINIMUM ORDER APPLIES PRODUCT MAY BE MADE OBSOLETE WITHOUT NOTICE
128K x 8 SRAM MSM8128 - 70/85/10/12
Elm Road, West Chirton, NORTH SHIELDS, Tyne & Wear NE29 8SE, England Tel. +44 (0191) 2930500 Fax. +44 (0191) 2590997
Issue 4.5: April 2001
Description The MSM8128 is a 1Mbit monolithic SRAM organised as 128K x 8. It is currently available in a VIL Package, with access times of 70, 85, 100, 120ns. It has a low power standby version and has 3.0V battery backup capability. It is directly TTL compatible and has common data inputs and outputs. Two pinout variants (single and dual CS) are available. All versions may be screened in accordance with MIL-STD-883.
131,072 x 8 CMOS Static RAM Features Access Times of 70/85/100/120 ns JEDEC standard Dual CS footprints. Operating Power 550 mW (max) Low Power Standby (-L) 2.2 mW (max) Low Voltage Data Retention. Completely Static Operation Directly TTL compatible. May be processed in accordance with MIL-STD-883
Block Diagram
Pin Definition
NC A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 D0 D1 D2 GND 1 2 3 4 5 6 7 8 TOP VIEW S,V 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC A15 CS2 WE A13 A8 A9 A11 OE A10 CS1 D7 D6 D5 D4 D3
MEMORY ARRAY 512 X 2048
Package Details Pin Count Description
Package Type
32
0.1" Vertical-in-LIne (VILTM)
V
Package details on pages 8 & 9.
See Page 9 for VX Pin Functions A0-A16 Address Inputs D0-7 Data Input/Output CS1 Chip Select 1 CS2 Chip Select 2 OE Output ……
